A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage ...
Socrates D. Vamvakos & Claude R. Gauthier & Chethan Rao & Karthisha Ramoshan Canagasaby & Prashant Choudhary & Sanjay Dabral & Shaishav Desai & Mahmudul Hassan & K.C. Hsieh & Bendik Kleveland & Gurupada Mandal & Richard Rouse & Ritesh Saraf & Alvin Wang & Jason Yeung & Khaldoon Abugharbieh & Ying Cao
Analog-to-Digital Conversion
未知
Session 6: High-Performance Receivers and Transmitters for Sub-6GHz ...
低功耗CMOS逐次逼近型模数转换器 [朱樟明,杨银堂著][科学出版社][..]
USB2.0协议中文版
Jungle
数值分析
Harmonic Balance Finite Element Method: Applications in Nonlinear ...
Junwei Lu & Xiaojun Zhao & Sotoshi Yamada
Dynamic Response of Linear Systems Impact of Pole & Zero Locations
jssc.2005.Replica Compensated Linear Regulators for PLLs
Cadence高速电路板设计与仿真 信号与电源完整性分析 第5版
基准源和温度检测模块设计-tang[..]
zwtang
基于CMOS工艺的全芯片ESD保护[..]
Assura Physical Verifica tion User Guide
Inc. Cadence Design Sys tems
VerilogA系统设计与仿真(可[..]
高效率电源管理集成电路设计技术研究
微波工程(第四版) (David M.Pozar) (Z-Library)
FSM
Modern Semiconductor Devices for Integrated Circuits
Chenming Calvin Hu
Nonlinear Hybrid Continuous/Discre[..] Models (Atlantis Studies ...
Marat Akhmet