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The Design of CMOS Radio-Frequency Integrated Circuits, Second Edition

The Design of CMOS Radio-Frequency Integrated Circuits, Second ...

一种带瞬态响应增强的无电容型LDO

一种带瞬态响应增强的无电容型LDO

CIRCUIT SIMULATION METHODS and ALGORITHMS

CIRCUIT SIMULATION METHODS and ALGORITHMS

一种具有温度补偿的带隙基准源及其输出缓冲器何捷

一种具有温度补偿的带隙基准源及其输[..] 何捷

半导体工艺和器件仿真工具Silvaco TCAD

半导体工艺和器件仿真工具Silvaco TCAD

A TIA in CMOS 0.18um

A TIA in CMOS 0.18um

Microsoft Word - 131_63212-IJAER ok 4118-modified document

Microsoft Word - 131_63212-IJAER ok 4118-modified document

一种具有高电源抑制比的低功耗CMOS带隙基准电压源汪宁

一种具有高电源抑制比的低功耗CMO[..] 汪宁

有限元方法（第五版）第一卷基本原理

有限元方法（第五版）第一卷基本原理

（英）O.C.Zienkiewicz （美）R.L.Taylor著

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP Product Guide (PG055)

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...

Chap1_20160228_4.dvi

Chap1_20160228_4.dvi

计算PSRR的新方法

计算PSRR的新方法

深亚微米CMOS工艺ESD器件结构优化与实验研究

深亚微米CMOS工艺ESD器件结构[..]

未命名图书

未命名图书

LDO设计论文

LDO设计论文

Verification of SD/MMC Controller IP Using UVM

Verification of SD/MMC Controller IP Using UVM

基于功耗优化的Pipelined+ADC系统结构设计与关键单元研究 (1)

基于功耗优化的Pipelined+[..] (1)

Category: that features three low phase-noise VCOs with a fundamental frequency range of 3.0 GHz to 6.0 GHz and a programmable dual RF output divider stage which allows coverage from 46.875 MHz to 6 GHz.

$Wideband RF PLL fractional/integer frequency synthesizer with integrated VCOs and LDOs$

Wideband RF PLL fractional/integer frequency synthesizer with ...

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