理工书库 lilin | Category: switched-loop filter (SLF)

Discover (Random Books)

《ModelSim电子系统分析及仿真》

《ModelSim电子系统分析及仿真》

Session 6

Session 6

Sampled Systems and the Effects of Clock Phase Noise and Jitter Application Note (AN-756)

Sampled Systems and the Effects of Clock Phase Noise and Jitter ...

Analog Devices, Inc.

带ESD保护结构的IO单元库的设计

带ESD保护结构的IO单元库的设计

Numerical Methods in Engineering with Python (2005)

Numerical Methods in Engineering with Python (2005)

ZigBee低中频接收机中复数滤波器的设计

ZigBee低中频接收机中复数滤波[..]

模拟集成电路的分析与设计格雷 839页 76M 高清书签版

模拟集成电路的分析与设计格雷 839页 76M 高清书签版

Session 7: Imagers and Range Sensors

Session 7: Imagers and Range Sensors

Design of Ultra Wideband Power Transfer Networks

Design of Ultra Wideband Power Transfer Networks

Binboga Siddik Yarman

A precise on-chip voltage generator for a gigascale dram with a negative word-line scheme - Solid-State Circuits, IEEE Journal of

A precise on-chip voltage generator for a gigascale dram with ...

开关电容电路从入门到精通 -刘明亮

开关电容电路从入门到精通 -刘明亮

教材：李庆扬数值分析-第五版

教材：李庆扬数值分析-第五版

Universal Serial Bus 3.0 Specification

Universal Serial Bus 3.0 Specification

低压、低功耗、高精度的逐次逼近型

低压、低功耗、高精度的逐次逼近型

The Designer’s Guide to Spice and Spectre by Kenneth S. Kundert (auth.) (z-lib.org)

The Designer’s Guide to Spice and Spectre by Kenneth S. Kundert ...

Next-Generation ADCs, High-Performance Power Management, and Technology Considerations for Advanced Integrated Circuits Advances in Analog Circu

Next-Generation ADCs, High-Performance Power Management, and ...

Session 8: Ultra-High-Speed Wireline

Session 8: Ultra-High-Speed Wireline

电路

Category: switched-loop filter (SLF)

A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop Filter PLL Using a Fast Phase-Error Correction Technique

A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop ...

Yongsun Lee & Taeho Seong & Seyeon Yoo & Jaehyouk Choi