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CMOS集成电路版图+概念、方法与工具（带书签）

CMOS集成电路版图+概念、方法与[..]

New developments in IC voltage regulators

New developments in IC voltage regulators

Session 12

Session 12

25Gbps系统封装和高速互连的信号完整性的基础性研究

25Gbps系统封装和高速互连的信[..]

2019 Millimeter-Wave Circuits for 5G and Radar

2019 Millimeter-Wave Circuits for 5G and Radar

微波工程（第3版）

微波工程（第3版）

（美）DAVID M.POZAR著张肇仪周乐柱吴德明等译

纳米级CMOS逐次逼近A D转换器设计研究与实现

纳米级CMOS逐次逼近A D转换器设计研究与实现

Design Procedures for Three-Stage CMOS OTAs With Nested-Miller Compensation

Design Procedures for Three-Stage CMOS OTAs With Nested-Miller ...

Session 7

Session 7

集成稳压电路系统鲁棒性与快速响应研究

集成稳压电路系统鲁棒性与快速响应研究

Three Stages CMOS OpAmp

Three Stages CMOS OpAmp

Session 11V-ADVANCED WIRELINE LINKS AND TECHNIQUES

Session 11V-ADVANCED WIRELINE LINKS AND TECHNIQUES

Bipolar and MOS Analog IC Design

Bipolar and MOS Analog IC Design

Alan B. Grebene

A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell lib - Solid-State Circuits, IEEE Journal of

A compact power-efficient 3 V CMOS rail-to-rail input/output ...

Julia中文文档

Julia中文文档

CN105530002B-中电华大2018-抗PVT的振荡器

CN105530002B-中电华大[..]

Control Systems Engineering

Control Systems Engineering

RF Circuit Design

RF Circuit Design

Bowick, Christopher;Blyler, John;Ajluni, Cheryl

Category: Charge pump (CP);fractional-<formula formulatype="inline"><tex Notation="TeX">$N$</tex> </formula> phase-locked loops (PLLs);phase noise

Analytical Phase-Noise Modeling and Charge Pump Optimization for Fractional-<formula formulatype="inline"><tex Notation="TeX">$N$</tex> </formula> PLLs

Analytical Phase-Noise Modeling and Charge Pump Optimization ...

Frank Herzel;Sabbir A. Osmany;J. Christoph Scheytt