控制之美 卷1 (王天威) (Z-Library)
未知
A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...
Kuan-Yueh Shen & Syed Feruz Syed Farooq & Yongping Fan & Khoa Minh Nguyen & Qi Wang & Mark L. Neidengard & Nasser Kurd & Amr Elshazly
Simulating Nonlinear Circuits with Python Power Electronics ...
模拟集成电路设计与仿真 何乐年
Edward
基于LDO新型过流保护电路设计
Spice-Oriented Nonlinear Circuit Analysis Using Harmonic Balance ...
NCSP'09
一个全差分运放电路的设计
Administrator
VLSI Physical Design: From Graph Partitioning to Timing Closure
Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu
CMOS Analog Circuit Design (1)
ESD设计与综合
作者
A mixed-mode esd protection circuit simulation-design methodology ...
CMOS模拟IP线性集成电路
CN104391533A-High[..] (power supply rejection ratio) LDO (low ...
Handbook of Power Management Circuits-Haruo Kobayashi
A 2.7-V 900-MHz CMOS LNA and Mixer - Solid-State Circuits, IEEE ...
IEEE
Abidi-Pan, Hui.University of California, Los Angeles
A low-power small-area /spl plusmn/7.28-ps-ji[..] 1-GHz DLL-based ...
Chulwoo Kim & In-Chul Hwang & Sung-Mo Kang
Cadence高速电路板设计与仿真 信号与电源完整性分析 第5版
Design techniques for cascoded CMOS op amps with improved PSRR ...
D.B. Ribner & M.A. Copeland