Simulating Nonlinear Circuits with Python Power Electronics ...
未知
拉扎维 数据转换器设计 原版
信号与系统下 第三版
Universal Verification Methodology (UVM) Cookbook
Functional Verification Methodology Team - Mentor & A Siemens Business
Session 29V
DDS关键公式计算
琥珀主
模拟集成电路信号完整性中抖动与振铃[..]
Continuous-Time Sigma-Delta AD Conversion Fundamentals, Performance ...
学校代码： 10246
tcheng
BSIM4 AND MOSFET MODELING FOR IC SIMULATION
Hu, Chenming, Liu, Weidong
Sampled Systems and the Effects of Clock Phase Noise and Jitter ...
Analog Devices, Inc.
Verilog数字系统设计教程
A fast-settling CMOS op amp for SC circuits with 90-dB DC gain
K. Bult;G.J.G.M. Geelen
一种高精密CMOS带隙基准源 王彦
A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop ...
Yongsun Lee & Taeho Seong & Seyeon Yoo & Jaehyouk Choi
Analysis and design of monolithic, high PSR, linear regulators ...
高频高速电子系统中的信号完整性研究
X-Parameters
DAVID E. ROOT
Distributed MOS varactor biasing for VCO gain equalization in ...
J. Mira & T. Divel & S. Ramet & J.-B. Begueret & Y. Deval