分类号 密级
USER
Creating Qsys Components
Altera Corporation
Virtuoso Visualization and Analysis XL User Guide
Inc. Cadence Design Sys tems
DDS信号发生器的实现
Administrator
CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...
D.J. Foley;M.P. Flynn
王华老师射频功放教材
未知
模拟电路与数字电路
林捷
设计Bandgap时考虑的几个问题
yzx
Session 20: High-Performance VCOs
CMOS TRANSCONDUCTANCE AMPLIFIER WITH FLOATING OPERATING POINT
untitled
CMOS Schmitt trigger design - Circuits and Systems I: Fundamental ...
IEEE
Truly Nonlinear Oscillations: Harmonic Balance, Parameter Expansions, ...
Ronald E. Mickens
基准源、噪声、开关电容及Monte Carlo仿真
学校代码 10530 学 号 201110061316
zxsr70885
A 470-nA Quiescent Current and 92.7%/94.7[..] Efficiency ...
A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop ...
Yongsun Lee & Taeho Seong & Seyeon Yoo & Jaehyouk Choi
ISSCC2021-T2-Fund[..] of Memory Subsystem Design for HPC and ...
7 Series FPGAs GTX/GTH Transceivers User Guide (UG476)
Xilinx, Inc.