Session 30: Non-Volatile Memories
未知
Algorithms for VLSI Physical Design Automation, 3E
Naveed Sherwani
A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process
Wenzha Yang & Yi Zhang & Enwen Dai & ZhiLin Feng & Wei Li
工作在亚阈值区CMOS OTA的研究
Session 32
Calibre® xACT User's Manual
Siemens Industry Software
eetop.cn 高增益恒跨导低失调轨至轨运算放大器的设计 彭新朝
CNKI
untitled
[Behzad Razavi] Phase-Locking in High-Performance (BookFi)
LDO设计小结一
zeng zhen
Cadence高速电路板设计与仿真 信号与电源完整性分析 第5版
ISSCC2021 Session 29
CMOS运算放大器和比较器的设计及应用 [GabrielAlfonsoRi[..] 著] 2014年版
ISSCC2021-T5-Cali[..] Techniques in ADCs
Microsoft Word - RDK FractN PLL Tutorial v1.0 090420
ramullen
一种高精度的CMOS带隙基准电压源
Gabriel Alfonso Rincon-Mora
Voltage References From Diodes to Precision High-Order Bandgap ...
7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge ...
Xilinx, Inc.