Session 13
未知
Design of an Active Harmonic Rejection N-Path Filter for Highly ...
Caleb Mosby Munsill
Session 16
thesis.dvi
Verification of SD/MMC Controller IP Using UVM
Layout Techniques for Integrated Circuit Designers
Sahrling
模拟集成电路设计 以LDO为例
Gabriel
ISM-PLL
eetop.cn (Paper)The Flipped Voltage Follower A Useful Cell for
Huijsing2017 Operational Amplifiers Theory and Design 3rd ed. ...
14984226455248291[..]
Nested Miller compensation in low-power CMOS design
Ka Nang Leung;P.K.T. Mok
ADS2008射频电路设计与仿真实例
徐兴福 著
计算电磁学要论 by 盛新庆 (z-lib.org)
CNKI
模拟集成电路设计与仿真
何乐年
ADS射频电路设计与仿真入门及应用实例
冯新宇著
数字信号处理导论MATLAB实现 2版 (Robert A.Schlling Sandra L... (z-lib.org)
Cadence SKILL Lan guage Reference
Inc. Cadence Design Sys tems
Calibre® WORKbench User's and Reference Manual
Siemens Industry Software
Calibre® DESIGNrev Reference Manual
Calibre® DESIGNrev Layout Viewer User's Manual
Calibre® DefectReview User's Manual