A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process
Wenzha Yang & Yi Zhang & Enwen Dai & ZhiLin Feng & Wei Li
Session 16
未知
PCI.Express.Base.2.0
High Speed Data Converters
Ahmed M.A. Ali
Intel® Quartus® Prime Standard Edition User Guide Platform Designer
Intel Corporation
信号与系统 MATLAB综合实验
Huijsing2017 Operational Amplifiers Theory and Design 3rd ed. ...
2014 PhD-Thesis BAG A Designer-Oriented Framework for the Development ...
ISSCC2021 Session 17
Xilinx DS249 LogiCORE IP CORDIC v4.0, Data Sheet,
Xilinx, Inc.
全差分运算放大器设计
唐长文
A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current ...
Hossein Miri Lavasani & Wanling Pan & Brandon Harrington & Reza Abdolvand & Farrokh Ayazi
一种高性能无片外电容型LDO设计
Session 20: High-Performance VCOs
基于CMOS工艺的全芯片ESD保护[..]
Design Optimization of Power and Area of Two-Stage CMOS Operational ...
Telugu Maddileti;Govindarajulu Salendra;Chandra Mohan Reddy ...
一种快速瞬态响应的无片外电容LDO
低压、低功耗、高精度的逐次逼近型
ycp
The Art of Analog Layout, Second Edition
Alan Hastings
Artificial Intelligence A Modern Approach (4th Edition)
Artificial Intelligence: A Modern Approach, Global Edition, ...
Stuart Russell / Peter Norvig
asicon.2009.53514[..] Power Supply Rejection
Assura Physical Verifica tion User Guide
Inc. Cadence Design Sys tems
Avalon Tri-state Conduit Components User Guide
Altera Corporation
Avalon Verification IP Suite User Guide
Avalon® Interface Specifications
AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)
AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...
axi4_stream_man.book
merickso
Bandgap & LDO-李福乐
Administrator
A bandgap reference using chopping for reduction of
A Basic Introduction to the gm ID-Based Design
BesserWM35.vp:Cor[..] 7.0
jpaiva
bingdian001.com
Bipolar and MOS Analog IC Design
Alan B. Grebene
The Biquadratic Filter [A Circuit for All Seasons]
Behzad Razavi
BOOK-010005000009[..]
zhenying.luo
Book.DVI
BSIM4 AND MOSFET MODELING FOR IC SIMULATION
Hu, Chenming, Liu, Weidong
bstj.1932.Nyquist, H.-Regeneration Theory
Cadence Physical Verifi cation User Guide
Cadence PVS Developers Guide
Cadence SKILL Lan guage Reference
Cadence高速电路板设计
Cadence高速电路板设计与仿真 信号与电源完整性分析 第5版
Calibre xACT Quick Reference
Siemens Industry Software
Calibre® DefectReview User's Manual
Calibre® DESIGNrev Layout Viewer User's Manual
Calibre® DESIGNrev Reference Manual
Calibre® Interactive (Classic GUI) User's Manual
Calibre® Local Printability Enhancement User's and Reference ...
Calibre® PERC User's Manual
Calibre® Query Server Manual
Calibre® RVE User's Manual
Calibre® WORKbench User's and Reference Manual
Calibre® xACT User's Manual
Calibre® xRC User's Manual
Cancellation of Amplifier Offset and f-Noise An Improved Chopper ...
CH01
Godming
ch3_pnjunction
Claudio Talarico
Chap1_20160228_4.dvi
Charge Pump Circuit Design [Pan, Feng and Samaddar, Tapan] Good ...
Chopper Stabilized Amplifiers
sean
Circuit Simulation by Farid N. Najm (z-lib.org)
CIRCUIT SIMULATION METHODS and ALGORITHMS
Jan Ogrodzki
Circuit Techniques for Reducing the Effects of Op-Amp Imperfections: ...
IEEE
CMOS Analog Circuit Design
4<8=8AB@0B>@
CMOS Analog Circuit Design (1)
A CMOS Chopper Opamp with Integrated Low-Pass Filter
CMOS Circuit Design, Layout, and Simulation
Baker, R. Jacob
CMOS Circuit Design, Layout, and Simulation, 3rd Edition (IEEE ...
R. Jacob Baker
CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...
D.J. Foley;M.P. Flynn
CMOS Fractional-N Synthesizers: Design for High Spectral Purity ...
Bram De Muer & Michiel Steyaert
CMOS IC LAYOUT
Wei Zhi
CMOS Mix-Signal Circuit Design Baker
CMOS Mixed-Signal Circuit Design, 2nd Ed
CMOS Realization of OTA as an Application in Low Power Amplifier ...
Ghanshyam Singh, Md Hameed Pasha
CMOS Schmitt trigger design - Circuits and Systems I: Fundamental ...