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ZigBee低中频接收机中复数滤波器的设计

ZigBee低中频接收机中复数滤波[..]

A 470-nA Quiescent Current and 92.7%/94.7% Efficiency DCT/PWM Control Buck Converter With Seamless Mode Selection for IoT Application

A 470-nA Quiescent Current and 92.7%/94.7[..] Efficiency ...

AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)

AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)

Analog Circuit Design Volume Three

Analog Circuit Design Volume Three

Bob Dobkin,John Hamburger

MOSAmpNoise.dvi

MOSAmpNoise.dvi

CMOS模拟集成电路设计与仿真实例基于Hspice

CMOS模拟集成电路设计与仿真实例基于Hspice

introduction.ppt

introduction.ppt

esd-circuits-and-devices

esd-circuits-and-[..]

ADS Interoperability for RFIC Design with ADS 2016.01

ADS Interoperability for RFIC Design with ADS 2016.01

Keysight EEsof EDA

24位96KSPSΣ-Δ调制器的设计

24位96KSPSΣ-Δ调制器的设计

CMOS Schmitt trigger design - Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

CMOS Schmitt trigger design - Circuits and Systems I: Fundamental ...

研究生系列教材数字信号处理：时域离散随机信号处理 11761429

研究生系列教材数字信号处理：时域离散随机信号处理 11761429

A precise on-chip voltage generator for a gigascale dram with a negative word-line scheme - Solid-State Circuits, IEEE Journal of

A precise on-chip voltage generator for a gigascale dram with ...

一种快速瞬态响应的无片外电容LDO的设计

一种快速瞬态响应的无片外电容LDO的设计

Advanced Computational Electromagnetic Methods and Applications

Advanced Computational Electromagnetic Methods and Applications

Yu, Li, Elsherbeni, Rahmat-Samii, Editors

Quantus Extraction Users Manual

Quantus Extraction Users Manual

数值分析基础（第三版） (关治、陆金甫) (z-lib.org)

数值分析基础（第三版） (关治、陆金甫) (z-lib.org)

js.2010.PFD biased with shunt regulator

js.2010.PFD biased with shunt regulator

Books

电路设计仿真

电路设计仿真

Microsoft Word - 异步FIFO的设计.doc

Microsoft Word - 异步FIFO的设计.doc

Fundamentals of Layout Design for Electronic Circuits

Fundamentals of Layout Design for Electronic Circuits

Jens Lienig Juergen Scheible

比较器失调的仿真方法

比较器失调的仿真方法

Microsoft PowerPoint - lect.08.RFSimulation [호환 모드]

Microsoft PowerPoint - lect.08.RFSimulation [호환 모드]

Design of class AB output stages using the structural methodology

Design of class AB output stages using the structural methodology

V. Ivanov & I. Filanovsky

Embedded Peripherals IP User Guide

Embedded Peripherals IP User Guide

Intel Corporation

AN 812: Platform Designer System Design Tutorial

AN 812: Platform Designer System Design Tutorial

Intel Corporation

Nios II Processor Reference Guide

Nios II Processor Reference Guide

Intel Corporation

Triple-Speed Ethernet Intel® FPGA IP User Guide

Triple-Speed Ethernet Intel® FPGA IP User Guide

Intel Corporation

Intel® Arria® 10 and Intel® Cyclone® 10 GX Avalon®-MM Interface for PCI Express* User Guide

Intel® Arria® 10 and Intel® Cyclone® 10 GX Avalon®-MM Interface ...

Intel Corporation

Avalon® Interface Specifications

Avalon® Interface Specifications

Intel Corporation

Embedded Design Handbook

Embedded Design Handbook

Intel Corporation

Intel® Quartus® Prime Standard Edition User Guide Platform Designer

Intel® Quartus® Prime Standard Edition User Guide Platform Designer

Intel Corporation

A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell lib - Solid-State Circuits, IEEE Journal of

A compact power-efficient 3 V CMOS rail-to-rail input/output ...

Power supply rejection ratio in operational transconductance amplifiers - Circuits and Systems, IEEE Transactions on

Power supply rejection ratio in operational transconductance ...

A High-swing Cmos Telescopic Operational Amplifier - Solid-State Circuits, IEEE Journal of

A High-swing Cmos Telescopic Operational Amplifier - Solid-State ...

Striving for small-signal stability - IEEE Circuits and Devices Magazine

Striving for small-signal stability - IEEE Circuits and Devices ...

Low-Jitter Process-Independent DLL and PLL Based on Self-Biased Techniques [Paper] - Solid-State Circuits, IEEE Journal of

Low-Jitter Process-Independent DLL and PLL Based on Self-Biased ...

High-Speed Architecture for a Programmable Frequency Divider and a Dual-Modulus Prescaler - Solid-State Circuits, IEEE Journal of

High-Speed Architecture for a Programmable Frequency Divider ...

A 3.3-V 12-b 50-MS/s A/D converter in 0.6-/spl mu/m CMOS with over 80-dB SFDR - Solid-State Circuits, IEEE Journal of

A 3.3-V 12-b 50-MS/s A/D converter in 0.6-/spl mu/m CMOS with ...

CMOS Schmitt trigger design - Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

CMOS Schmitt trigger design - Circuits and Systems I: Fundamental ...

A precise on-chip voltage generator for a gigascale dram with a negative word-line scheme - Solid-State Circuits, IEEE Journal of

A precise on-chip voltage generator for a gigascale dram with ...

The Design of Low-Noise Bandgap References - Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

The Design of Low-Noise Bandgap References - Circuits and Systems ...

A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier - Solid-State Circuits, IEEE Journal of

A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier - Solid-State Circuits, ...

A 1 GHz CMOS RF Front-End IC for a Direct-Conversion Wireless Receiver - Solid-State Circuits, IEEE Journal of

A 1 GHz CMOS RF Front-End IC for a Direct-Conversion Wireless ...

A 2.7-V 900-MHz CMOS LNA and Mixer - Solid-State Circuits, IEEE Journal of

A 2.7-V 900-MHz CMOS LNA and Mixer - Solid-State Circuits, IEEE ...

Circuit Techniques for Reducing the Effects of Op-Amp Imperfections: Autozeroing, Correlated Double - Proceedings of the IEEE

Circuit Techniques for Reducing the Effects of Op-Amp Imperfections: ...

A gm/ID Based Methodology for the Design of CMOS Analog Circuits andd Its Application to the S - Solid-State Circuits, IEEE Journal of

A gm/ID Based Methodology for the Design of CMOS Analog Circuits ...

高精度带隙基准电压源的研究与设计

高精度带隙基准电压源的研究与设计

THE DESIGN OF MASTER-SLAVE DLL FOR DDR2 SDRAM CONTROLLER IN PHY

THE DESIGN OF MASTER-SLAVE DLL FOR DDR2 SDRAM CONTROLLER IN ...

Preparation of Papers in Two-Column Format for the Proceedings of the 2004 Sarnoff Symposium

Preparation of Papers in Two-Column Format for the Proceedings ...

高PSRR无电容型线性稳压器的研究与设计

高PSRR无电容型线性稳压器的研究与设计

低电压CMOS分数分频锁相环频率综合器关键技术研究

低电压CMOS分数分频锁相环频率综合器关键技术研究

A 240-nA Quiescent Current, 95.8% Efficiency AOT-Controlled Buck Converter With A<sup>2</sup>-Comparator and Sleep-Time Detector for IoT Application

A 240-nA Quiescent Current, 95.8% Efficiency AOT-Controlled ...

Wenbin Huang & Lianxi Liu & Xufeng Liao & Chengzhi Xu & Yonyuan Li

ISF_TUTORIAL

ISF_TUTORIAL

BSIM4 AND MOSFET MODELING FOR IC SIMULATION

BSIM4 AND MOSFET MODELING FOR IC SIMULATION

Hu, Chenming, Liu, Weidong

Modern Semiconductor Devices for Integrated Circuits

Modern Semiconductor Devices for Integrated Circuits

Chenming Calvin Hu

信号分析与处理_MATLAB语言及应用

信号分析与处理_MATLAB语言及应用

http://www.pris.edu.cn

Linear Control System Analysis and Design with MATLAB®, Sixth Edition

Linear Control System Analysis and Design with MATLAB®, Sixth ...

Houpis, Constantine H., Sheldon, Stuart N.

Smoothing the Way for Digital Phase-Locked Loops: Clock Generation in the Future with Digital Signal Processing for Mitigating Spur and Interference

Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...

Cheng-Ru Ho & Mike Shuo-Wei Chen

高速低功耗SAR ADC的关键技术研究与系统设计

高速低功耗SAR ADC的关键技术研究与系统设计

USB 2.0

USB 2.0

Design Procedure for Two-Stage CMOS Opamp using gm/ID design Methodology in 16 nm FinFET Technology

Design Procedure for Two-Stage CMOS Opamp using gm/ID design ...

Bakr Hesham & El-Sayed Hasaneen & Hesham F. A. Hamed

Microsoft Word - xx3_apx_ce.doc

Microsoft Word - xx3_apx_ce.doc

Rashaunda Henderson

Topic 8 Circuit Envelope

Topic 8 Circuit Envelope

Rashaunda Henderson

Adaptive Filter Theory 5/E

Adaptive Filter Theory 5/E

模拟电路版图的艺术

模拟电路版图的艺术

ALAN HASTINGS著

The Art of Analog Layout, Second Edition

The Art of Analog Layout, Second Edition

Microsoft Word - Chapter1 Importance of Impedance matching.doc

Microsoft Word - Chapter1 Importance of Impedance matching.doc

Oscillator phase noise: a tutorial

Oscillator phase noise: a tutorial

T.H. Lee;A. Hajimiri

PCI Express Base r3.1

PCI Express Base r3.1

现代控制系统第12版

现代控制系统第12版

（美）RECHARD C.DORF，ROBERT H.BISHOP著；谢红卫，孙志强，宫二玲，经纪阳译

DjVu Document

DjVu Document

RISC-V IOMMU Architecture Specification

RISC-V IOMMU Architecture Specification

IOMMU Task Group

RF and Microwave Power Amplifier Design, Second Edition

RF and Microwave Power Amplifier Design, Second Edition

Andrei Grebennikov

RF and Microwave Power Amplifier Design

RF and Microwave Power Amplifier Design

Andrei Grebennikov

Bipolar and MOS Analog IC Design

Bipolar and MOS Analog IC Design

Alan B. Grebene

Analysis and Design of Analog Integrated Circuits, 5th Edition

Analysis and Design of Analog Integrated Circuits, 5th Edition

深入理解LINUX虚拟内存管理

深入理解LINUX虚拟内存管理

（爱尔兰）MEL GORMAN著