Session 33
未知
基于嵌入式密勒补偿技术的LDO放大器设计
SPI Block Guide V4
Freescale Semiconductor, Inc.
DIT-FFT至简设计实现法
luke
工作于亚阈值区的偏置基准电路-峰值电流镜
逐达逼近型模数转换器的低功耗与高速[..]
DESIGN WITH OPERATIONAL AMPLIFIERS AND
Operational Amplifiers Theory and Design (Johan Huijsing (auth.)) ...
通信原理 第7版
樊昌信，曹丽娜编著
PDFѹËõÆ÷
低压低功耗电流模CMOS带隙基准电路 孔令荣
ADS射频电路设计与仿真从入门到精通
陈铖颖
Advanced_Signal_I[..]
ldmos tech
一种基于LDO稳压器的带隙基准电压源设计
Frequency Compensation of Op-amp and its types Circuit Digest
一种适用于高压电源管理的无输出电容[..]
AMBA AXI Protocol Specification
ARM Limited
Chopper Stabilized Amplifiers
sean
一种适用于微传感器读出电路的低噪声[..]
一个全差分运放电路的设计
Administrator
Modified modeling of Miller compensation for two-stage operational ...
H.C. Yang;D.J. Allstot
频率补偿研究心得
番茄花园
补偿电路总结
Microsoft PowerPoint - Random_Offset_CMO[..]
Mama
Matching Analysis and the Design of Low Offset Amplifiers
Microsoft Word - Frequency Response.doc
rayork
Single miller capacitor frequency compensation technique for ...
te.2005.杨氏零点再发现
一种适用于微传感器读出电路的低噪声[..] (1)
93.张强-高性能Rail to Rail恒定跨导CMOS运算放大器
一款轨到轨输入 输出运算放大器的设计与研究 辛国松
Robust Design of LV/LP Low-Distortion CMOS Rail-to-Rail Input ...
US6380806B1-Diffe[..] telescopic operational amplifier having ...
反馈运算放大器电路的噪声分析和设计
A High-swing Cmos Telescopic Operational Amplifier - Solid-State ...
IEEE
Striving for small-signal stability - IEEE Circuits and Devices ...
工作在亚阈值区CMOS OTA的研究
tcsii.2005.A new modeling and optimization of gain-boosted cascode ...
共源共栅实验五
USER
ISM-PLL
DUTY CYCLE CORRECTION CIRCUITRY
DELAY LOCKLOOP CIRCUIT
14990665645773625[..]
Low-Jitter Process-Independent DLL and PLL Based on Self-Biased ...
CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...
D.J. Foley;M.P. Flynn
基于 DLL倍频技术的 1GHz本地振荡器设计 英文 李金城
A low-power small-area /spl plusmn/7.28-ps-ji[..] 1-GHz DLL-based ...
Chulwoo Kim & In-Chul Hwang & Sung-Mo Kang
Frontmatter
2019 Book Digital Subsampling Phase Lock Techniques for Frequency ...
系统芯片中的全数字锁相环设计
thesis.dvi
High-Speed Architecture for a Programmable Frequency Divider ...
锁相环型频率综合器中的高速分频器 袁泉
Microsoft Word - RDK FractN PLL Tutorial v1.0 090420
ramullen
Understanding Jitter Requirements of PLL-Based Processors Application ...
ANALOG DEVICES INC.
2004Beek
Wiener-Khinchin theorem
PLL频率合成器的杂散性能分析
14984226455248291[..]
锁相环相位噪声与环路带宽的关系分析
AN827_RevA.fm
mamiller
Analytical Phase-Noise Modeling and Charge Pump Optimization ...
Frank Herzel;Sabbir A. Osmany;J. Christoph Scheytt
相位噪声jitter基本定义
yzx
Enhanced phase noise modeling of fractional-N frequency synthesizers
H. Arora;N. Klemmer;J.C. Morizio;P.D. Wolf
All-Digital Frequency Synthesizer for RF Wireless Application
tcheng
A modeling approach for /spl Sigma/-/spl Delta/ fractional-N ...
M.H. Perrott & M.D. Trott & C.G. Sodini
Oscillator phase noise: a tutorial
T.H. Lee;A. Hajimiri
基于延迟锁相环的时钟发生器设计
Microsoft PowerPoint - PLLnoise_jitter02[..] [相容模式]
cwhsu
A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop ...
Yongsun Lee & Taeho Seong & Seyeon Yoo & Jaehyouk Choi
THE DESIGN OF MASTER-SLAVE DLL FOR DDR2 SDRAM CONTROLLER IN ...
iccad095
Microsoft PowerPoint - PLL_UT_tutorial_A[..]
enjoy
低电压CMOS分数分频锁相环频率综合器 关键技术研究
LU HUNG
全单片集成的多模CMOS正交频率综[..]
PHASE-INTERPOLATOR BASED PLL FREQUENCY SYNTHESIZER
Wideband RF PLL fractional/integer frequency synthesizer with ...
STMICROELECTRONICS
PHASE ERROR CANCELLATION