Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...
Cheng-Ru Ho & Mike Shuo-Wei Chen
Precise delay generation using coupled oscillators
J.G. Maneatis & M.A. Horowitz
Session 15: Compute-in-Memory Processors for Deep Neural Networks
未知
现代控制系统 第八版
linhai
Verilog数字系统设计教程
2010_FrontMatter_[..]
Steve Bonney
Session 33: High-Voltage, GaN and Wireless Power
Sampled Systems and the Effects of Clock Phase Noise and Jitter ...
Analog Devices, Inc.
Design of Analog CMOS Integrated Circuits, Second Edition
Behzad Razavi
普通高等教育“十一五”国家级规划教材 现代控制理论 （第三版）
刘豹 唐万生主编
AMBA AXI Protocol Specification
ARM Limited
Harmonic Balance for Nonlinear Vibration Problems
0002624
一种高摆率低功耗无片外电容的LDO设计
a-new-semiconduct[..]
Verilog HDL Design Examples
Joseph Cavanagh
ISSCC2020-01 Visuals
德州仪器高性能模拟器件高效应用指南[..] 大学计划
Texas Instruments, Incorporated [ZHCP055,*]
深亚微米FPGA结构与CAD设计 12083165 2
大电流、高稳定性的LDO线形稳压器
LDO工作原理详解
LDO设计小结一
zeng zhen
LDO设计小结二
高效率 PWM 控制电流型 DC-DC
Lenovo User
高效率峰值电流模BOOST型DC-[..]
jlxu
高效率boost DCDC电源管理芯片设计技术研究
wumin
PWM/PFM 模式 DC-DC 升压转换器电路的设计
yyk
509764_1_En_Print[..]
0014813
DESIGN WITH OPERATIONAL AMPLIFIERS AND
低功率、高分辨率的A-D转换器@2018
作者
TCASⅡ 202212
JSSC 202212
TMTT 202212
Practical RF Amplifier Design and Performance Optimization with ...
ISSCC2020-01 Digest
ISSCC2021-SC1-Int[..] to PLLs Phase Noise, Modeling, and Key ...
ISSCC2021-T12-com[..]
ISSCC2021-SC2-PLL Architectures, Tradeoffs, and Key Application ...
ISSCC2021-T10-Fun[..] of Fully-Integrated Voltage Regulators
ISSCC2021-T9-Desi[..] Amplifiers for Stability
ISSCC2021-T11-Ult[..] Power Wireless Receiver Design
ISSCC2021-T8-On-Chip Interconnects Basic Concepts, Designs, ...
ISSCC2021-T7-Basic Design Approaches to Accelerating Deep Neural ...
ISSCC2021-T6-Basics of DAC-based Wireline Transmitters
ISSCC2021-T3-Silicon Photonics – from Basics to ASICs
ISSCC2021-T5-Cali[..] Techniques in ADCs
ISSCC2021-T4-Meas[..] and Evaluating the Security Level of ...
ISSCC2021-T2-Fund[..] of Memory Subsystem Design for HPC and ...
ISSCC2021-T1-Fund[..] of RF and Mm-Wave Power Amplifier Designs
ISSCC2021-SC4-Pro[..] Clock Generation, Distribution, and Clock ...
ISSCC2021-SC3-Clo[..] Clock Distribution, and Clock Management ...
Session 2: Highlighted Chip Releases: 5G and Radar Systems
Session 3: Highlighted Chip Releases: Modern Digital SoCs
Session 4: Processors
Session 1: Plenary Session — Invited Papers
Session 36
Session 35
Session 34
Session 33
Session 32
Session 31
Session 29V
Session 28V
Session 26V
Session 30
Session 27
Session 25
Session 24
Session 23
Session 22
Session 21
Session 20
Session 19
Session 18
Session 17
Session 16
Session 15
Session 13