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基于零极点追踪的高稳定性片内LDO电路设计

基于零极点追踪的高稳定性片内LDO[..]

Session 6

Session 6

ZigBee低中频接收机中复数滤波器的设计

ZigBee低中频接收机中复数滤波[..]

FPGA数字信号处理设计教程：System Generator入门与提高 11938681

FPGA数字信号处理设计教程：Sy[..] Generator入门与提高 11938681

一种应用于LDO的CMOS误差放大器设计

一种应用于LDO的CMOS误差放大器设计

Spice-Oriented Nonlinear Circuit Analysis Using Harmonic Balance Method

Spice-Oriented Nonlinear Circuit Analysis Using Harmonic Balance ...

信号与系统 2nd 西蒙赫金

信号与系统 2nd 西蒙赫金

Noise and Spurious Tones Management Techniques for Multi-GHz RF-CMOS Frequency Synthesizers Operating in Large Mixed Analog-Digital SOCs

Noise and Spurious Tones Management Techniques for Multi-GHz ...

HarmonicBalance

HarmonicBalance

Session 14: mm-Wave Transceivers for Communication and Radar

Session 14: mm-Wave Transceivers for Communication and Radar

带ESD保护结构的IO单元库的设计

带ESD保护结构的IO单元库的设计

CMOS Circuit Design, Layout, and Simulation

CMOS Circuit Design, Layout, and Simulation

Baker, R. Jacob

Robust Design of LV/LP Low-Distortion CMOS Rail-to-Rail Input Stages

Robust Design of LV/LP Low-Distortion CMOS Rail-to-Rail Input ...

数字信号处理及其matlab实现

数字信号处理及其matlab实现

Simulating Switched-Capacitor Filters with SpectreRF

Simulating Switched-Capacitor Filters with SpectreRF

ISSCC2021-T11-Ultra-Low Power Wireless Receiver Design

ISSCC2021-T11-Ult[..] Power Wireless Receiver Design

ISSCC2021-SC3

ISSCC2021-SC3

Design of class AB output stages using the structural methodology

Design of class AB output stages using the structural methodology

V. Ivanov & I. Filanovsky

Publisher: IEEE

A 0.46ps RJ<inf>rms</inf> 5GHz wideband LC PLL for multi-protocol 10Gb/s SerDes

A 0.46ps RJ<inf>rms</inf> 5GHz wideband LC PLL for multi-protocol ...

Chethan Rao & Alvin Wang & Shaishav Desai

A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process

A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process

Wenzha Yang & Yi Zhang & Enwen Dai & ZhiLin Feng & Wei Li

A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process

A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process

Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Yin-Zu Lin

A 1.24 μA Quiescent Current NMOS Low Dropout Regulator With Integrated Low-Power Oscillator- Driven Charge-Pump and Switched-Capacitor Pole Tracking Compensation

A 1.24 μA Quiescent Current NMOS Low Dropout Regulator With ...

Raveesh Magod & Bertan Bakkaloglu & Sanjeev Manandhar

A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation

A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation

Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Ying-Zu Lin & Chung-Ming Huang & Chih-Hao Huang & Linkai Bu & Chih-Chung Tsai

A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage CMOS for FPGA applications

A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage ...

Socrates D. Vamvakos & Claude R. Gauthier & Chethan Rao & Karthisha Ramoshan Canagasaby & Prashant Choudhary & Sanjay Dabral & Shaishav Desai & Mahmudul Hassan & K.C. Hsieh & Bendik Kleveland & Gurupada Mandal & Richard Rouse & Ritesh Saraf & Alvin Wang & Jason Yeung & Khaldoon Abugharbieh & Ying Cao

A 240-nA Quiescent Current, 95.8% Efficiency AOT-Controlled Buck Converter With A<sup>2</sup>-Comparator and Sleep-Time Detector for IoT Application

A 240-nA Quiescent Current, 95.8% Efficiency AOT-Controlled ...

Wenbin Huang & Lianxi Liu & Xufeng Liao & Chengzhi Xu & Yonyuan Li

A 470-nA Quiescent Current and 92.7%/94.7% Efficiency DCT/PWM Control Buck Converter With Seamless Mode Selection for IoT Application

A 470-nA Quiescent Current and 92.7%/94.7[..] Efficiency ...

A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current Pre-Amplifier for High Frequency Lateral MEMS Oscillators

A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current ...

Hossein Miri Lavasani & Wanling Pan & Brandon Harrington & Reza Abdolvand & Farrokh Ayazi

Analysis and Design of ESD Protection for Robust Low-Power Pierce Crystal Oscillator Startup

Analysis and Design of ESD Protection for Robust Low-Power Pierce ...

Kim B. Ostman & Erlend Strandvik & Phil Corbishley & Tor Oyvind Vedal & Mika Salmi

The Biquadratic Filter [A Circuit for All Seasons]

The Biquadratic Filter [A Circuit for All Seasons]

The Delta-Sigma Modulator [A Circuit for All Seasons]

The Delta-Sigma Modulator [A Circuit for All Seasons]

Design of class AB output stages using the structural methodology

Design of class AB output stages using the structural methodology

V. Ivanov & I. Filanovsky

Design Procedure for Two-Stage CMOS Opamp using gm/ID design Methodology in 16 nm FinFET Technology

Design Procedure for Two-Stage CMOS Opamp using gm/ID design ...

Bakr Hesham & El-Sayed Hasaneen & Hesham F. A. Hamed

Digital Beamforming-Based Massive MIMO Transceiver for 5G Millimeter-Wave Communications

Digital Beamforming-Based Massive MIMO Transceiver for 5G Millimeter-Wave ...

Binqi Yang & Zhiqiang Yu & Ji Lan & Ruoqiao Zhang & Jianyi Zhou & Wei Hong

Embedded Mixed-Signal IP Development Methodology in 90nm CMOS SerDes FPGAs

Embedded Mixed-Signal IP Development Methodology in 90nm CMOS ...

Rakesh H. Patel & William Bereza

A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm CMOS

A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...

Kuan-Yueh Shen & Syed Feruz Syed Farooq & Yongping Fan & Khoa Minh Nguyen & Qi Wang & Mark L. Neidengard & Nasser Kurd & Amr Elshazly

Frequency Reconfigurable mm-Wave Power Amplifier With Active Impedance Synthesis in an Asymmetrical Non-Isolated Combiner: Analysis and Design

Frequency Reconfigurable mm-Wave Power Amplifier With Active ...

Chandrakanth R. Chappidi & Kaushik Sengupta

IEEE Standard for Ethernet

IEEE Standard for Ethernet

Low Drop-Out Voltage Regulators: Capacitor-less Architecture Comparison

Low Drop-Out Voltage Regulators: Capacitor-less Architecture ...

Joselyn Torres & Mohamed El-Nozahi & Ahmed Amer & Seenu Gopalraju & Reza Abdullah & Kamran Entesari & Edgar Sanchez-Sinencio

A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop Filter PLL Using a Fast Phase-Error Correction Technique

A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop ...

Yongsun Lee & Taeho Seong & Seyeon Yoo & Jaehyouk Choi

A low-power small-area /spl plusmn/7.28-ps-jitter 1-GHz DLL-based clock generator

A low-power small-area /spl plusmn/7.28-ps-ji[..] 1-GHz DLL-based ...

Chulwoo Kim & In-Chul Hwang & Sung-Mo Kang

Millimeter-Wave Frequency Reconfigurable Dual-Band CMOS Power Amplifier for 5G Communication Radios

Millimeter-Wave Frequency Reconfigurable Dual-Band CMOS Power ...

Jaehun Lee & Ji-Seon Paek & Songcheol Hong

$A modeling approach for /spl Sigma/-/spl Delta/ fractional-N frequency synthesizers allowing straightforward noise analysis$

A modeling approach for /spl Sigma/-/spl Delta/ fractional-N ...

M.H. Perrott & M.D. Trott & C.G. Sodini

Multi-Feed Antenna and Electronics Co-Design: An E-Band Antenna-LNA Front End With On-Antenna Noise-Canceling and <italic>Gₘ</italic>-Boosting

Multi-Feed Antenna and Electronics Co-Design: An E-Band Antenna-LNA ...

Scaling <formula formulatype="inline"><tex Notation="TeX">$LC$</tex></formula> Oscillators in Nanometer CMOS Technologies to a Smaller Area But With Constant Performance

Scaling <formula formulatype="inli[..] Notation="TeX">$L[..] ...

Shih-An Yu & Peter R. Kinget

Scaling LC Oscillators in Nanometer CMOS Technologies to a Smaller Area But With Constant Performance

Scaling LC Oscillators in Nanometer CMOS Technologies to a Smaller ...

Shih-An Yu & Peter R. Kinget

A Single-Trim CMOS Bandgap Reference With aInaccuracy of0.15% From40C to 125C

A Single-Trim CMOS Bandgap Reference With aInaccuracy of0.15% ...

Guang Ge & Cheng Zhang & Gian Hoogzaad & Kofi A. A. Makinwa

Smoothing the Way for Digital Phase-Locked Loops: Clock Generation in the Future with Digital Signal Processing for Mitigating Spur and Interference

Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...

Cheng-Ru Ho & Mike Shuo-Wei Chen