通信原理公式手册
艇长
全数字锁相环建模及分析代码-2014
未知
FSM
Universal Verification Methodology (UVM) Cookbook
Functional Verification Methodology Team - Mentor & A Siemens Business
Analog-to-Digital Conversion 3rd
高效率boost DCDC电源管理芯片设计技术研究
wumin
14558797
架构艺术
Design of Bandgap Reference and Current Reference Generator ...
Pages from M.E. Van Valkenburg - Network Analysis 6(1959, Prentice ...
libgen.lc-2
使用ADS对多个S参数进行离散扫描
XU,YUE (K-China,ex1)
Numerical Methods for Engineering: An introduction using MATLAB® ...
Karl F. Warnick
IP3 and Intermodulation Guide | Maxim Integrated
TMTT 202212
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Design techniques for cascoded CMOS op amps with improved PSRR ...
D.B. Ribner & M.A. Copeland
ISSCC2021-T9-Desi[..] Amplifiers for Stability
Frontmatter
IEEE Standard for Ethernet
Multi-Feed Antenna and Electronics Co-Design: An E-Band Antenna-LNA ...
A 470-nA Quiescent Current and 92.7%/94.7[..] Efficiency ...
Scaling LC Oscillators in Nanometer CMOS Technologies to a Smaller ...
Shih-An Yu & Peter R. Kinget
Scaling <formula formulatype="inli[..] Notation="TeX">$L[..] ...
A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process
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Digital Beamforming-Based Massive MIMO Transceiver for 5G Millimeter-Wave ...
Binqi Yang & Zhiqiang Yu & Ji Lan & Ruoqiao Zhang & Jianyi Zhou & Wei Hong
A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage ...
Socrates D. Vamvakos & Claude R. Gauthier & Chethan Rao & Karthisha Ramoshan Canagasaby & Prashant Choudhary & Sanjay Dabral & Shaishav Desai & Mahmudul Hassan & K.C. Hsieh & Bendik Kleveland & Gurupada Mandal & Richard Rouse & Ritesh Saraf & Alvin Wang & Jason Yeung & Khaldoon Abugharbieh & Ying Cao
Low Drop-Out Voltage Regulators: Capacitor-less Architecture ...
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A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...
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The Biquadratic Filter [A Circuit for All Seasons]
Behzad Razavi
The Delta-Sigma Modulator [A Circuit for All Seasons]
A 0.46ps RJ<inf>rms</inf> 5GHz wideband LC PLL for multi-protocol ...
Chethan Rao & Alvin Wang & Shaishav Desai
A modeling approach for /spl Sigma/-/spl Delta/ fractional-N ...
M.H. Perrott & M.D. Trott & C.G. Sodini
Embedded Mixed-Signal IP Development Methodology in 90nm CMOS ...
Rakesh H. Patel & William Bereza
Analysis and Design of ESD Protection for Robust Low-Power Pierce ...
Kim B. Ostman & Erlend Strandvik & Phil Corbishley & Tor Oyvind Vedal & Mika Salmi
A 1.24 μA Quiescent Current NMOS Low Dropout Regulator With ...
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A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation
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A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process
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A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop ...
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Millimeter-Wave Frequency Reconfigurable Dual-Band CMOS Power ...
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A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current ...
Hossein Miri Lavasani & Wanling Pan & Brandon Harrington & Reza Abdolvand & Farrokh Ayazi
A low-power small-area /spl plusmn/7.28-ps-ji[..] 1-GHz DLL-based ...
Chulwoo Kim & In-Chul Hwang & Sung-Mo Kang
Design of class AB output stages using the structural methodology
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Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...
Cheng-Ru Ho & Mike Shuo-Wei Chen
Design Procedure for Two-Stage CMOS Opamp using gm/ID design ...
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A Single-Trim CMOS Bandgap Reference With aInaccuracy of0.15% ...
Guang Ge & Cheng Zhang & Gian Hoogzaad & Kofi A. A. Makinwa
Frequency Reconfigurable mm-Wave Power Amplifier With Active ...
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