Microsoft Word - Frequency Response.doc
rayork
Session 15: Compute-in-Memory Processors for Deep Neural Networks
未知
Handbook of Algorithms for Physical Design Automation
Charles J. Alpert, Dinesh P. Mehta, Sachin S. Sapatnekar
Adaptive Filter Theory 5/E
Simon Haykin
Introduction to Linear Algebra by Gilbert Strang (z-lib.org)
Switching Power Supplies A to Z
Maniktala, Sanjaya.
CN106357266B-华为20[..]
LDO降压转换器的稳定性分析
开关电容电路 从入门到精通 -刘明亮
Middlebrook Part 1
mwidmer
Low-noise monolithic amplifier design: Bipolar versus CMOS
模拟CMOS集成电路 第二版 拉扎维 by 拉扎维 (z-lib.org)
ISSCC 2019 Digest of Technical Papers
反馈系统
Feedback Systems An Introduction for Scientists & Engineers (2008, Princeton University Press)
锁相环型频率综合器中的高速分频器 袁泉
Spectre Circuit Simulator and Accelerated Parallel Simula tor ...
Inc. Cadence Design Sys tems
微波工程 （第3版）
（美）DAVID M.POZAR著 张肇仪 周乐柱 吴德明等译
IP3 and Intermodulation Guide | Maxim Integrated
IEEE Standard for Ethernet
Design Procedure for Two-Stage CMOS Opamp using gm/ID design ...
Bakr Hesham & El-Sayed Hasaneen & Hesham F. A. Hamed
A Single-Trim CMOS Bandgap Reference With aInaccuracy of0.15% ...
Guang Ge & Cheng Zhang & Gian Hoogzaad & Kofi A. A. Makinwa
Multi-Feed Antenna and Electronics Co-Design: An E-Band Antenna-LNA ...
Millimeter-Wave Frequency Reconfigurable Dual-Band CMOS Power ...
Jaehun Lee & Ji-Seon Paek & Songcheol Hong
Frequency Reconfigurable mm-Wave Power Amplifier With Active ...
Chandrakanth R. Chappidi & Kaushik Sengupta
Digital Beamforming-Based Massive MIMO Transceiver for 5G Millimeter-Wave ...
Binqi Yang & Zhiqiang Yu & Ji Lan & Ruoqiao Zhang & Jianyi Zhou & Wei Hong
Low Drop-Out Voltage Regulators: Capacitor-less Architecture ...
Joselyn Torres & Mohamed El-Nozahi & Ahmed Amer & Seenu Gopalraju & Reza Abdullah & Kamran Entesari & Edgar Sanchez-Sinencio
A 1.24 μA Quiescent Current NMOS Low Dropout Regulator With ...
Raveesh Magod & Bertan Bakkaloglu & Sanjeev Manandhar
A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process
Wenzha Yang & Yi Zhang & Enwen Dai & ZhiLin Feng & Wei Li
Embedded Mixed-Signal IP Development Methodology in 90nm CMOS ...
Rakesh H. Patel & William Bereza
Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...
Cheng-Ru Ho & Mike Shuo-Wei Chen
Scaling LC Oscillators in Nanometer CMOS Technologies to a Smaller ...
Shih-An Yu & Peter R. Kinget
A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...
Kuan-Yueh Shen & Syed Feruz Syed Farooq & Yongping Fan & Khoa Minh Nguyen & Qi Wang & Mark L. Neidengard & Nasser Kurd & Amr Elshazly
A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop ...
Yongsun Lee & Taeho Seong & Seyeon Yoo & Jaehyouk Choi
A modeling approach for /spl Sigma/-/spl Delta/ fractional-N ...
M.H. Perrott & M.D. Trott & C.G. Sodini
A low-power small-area /spl plusmn/7.28-ps-ji[..] 1-GHz DLL-based ...
Chulwoo Kim & In-Chul Hwang & Sung-Mo Kang
The Biquadratic Filter [A Circuit for All Seasons]
Behzad Razavi
A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current ...
Hossein Miri Lavasani & Wanling Pan & Brandon Harrington & Reza Abdolvand & Farrokh Ayazi
The Delta-Sigma Modulator [A Circuit for All Seasons]
Scaling <formula formulatype="inli[..] Notation="TeX">$L[..] ...
A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process
Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Yin-Zu Lin
A 470-nA Quiescent Current and 92.7%/94.7[..] Efficiency ...
A 240-nA Quiescent Current, 95.8% Efficiency AOT-Controlled ...
Wenbin Huang & Lianxi Liu & Xufeng Liao & Chengzhi Xu & Yonyuan Li
A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation
Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Ying-Zu Lin & Chung-Ming Huang & Chih-Hao Huang & Linkai Bu & Chih-Chung Tsai
A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage ...
Socrates D. Vamvakos & Claude R. Gauthier & Chethan Rao & Karthisha Ramoshan Canagasaby & Prashant Choudhary & Sanjay Dabral & Shaishav Desai & Mahmudul Hassan & K.C. Hsieh & Bendik Kleveland & Gurupada Mandal & Richard Rouse & Ritesh Saraf & Alvin Wang & Jason Yeung & Khaldoon Abugharbieh & Ying Cao
A 0.46ps RJ<inf>rms</inf> 5GHz wideband LC PLL for multi-protocol ...
Chethan Rao & Alvin Wang & Shaishav Desai
Analysis and Design of ESD Protection for Robust Low-Power Pierce ...
Kim B. Ostman & Erlend Strandvik & Phil Corbishley & Tor Oyvind Vedal & Mika Salmi
Design of class AB output stages using the structural methodology
V. Ivanov & I. Filanovsky