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DjVu Document

DjVu Document

Session 20

Session 20

一种极低静态电流LDO线性稳压器的设计

一种极低静态电流LDO线性稳压器的设计

(EE) Razavi, Design of Analog CMOS Integrated Circuits 2nd

(EE) Razavi, Design of Analog CMOS Integrated Circuits 2nd

CN105824349A-上海巨微集成-chopped bandgap

CN105824349A-上海巨微[..] bandgap

Operational Amplifiers Theory and Design (Johan Huijsing (auth.)) (Z-Library)

Operational Amplifiers Theory and Design (Johan Huijsing (auth.)) ...

ISSCC2021 Session 29

ISSCC2021 Session 29

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP Product Guide (PG055)

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...

lnaDesign2

lnaDesign2

Diva Reference

Diva Reference

Inc. Cadence Design Sys tems

CMOS 集成电路设计手册第3版·模拟电路篇=CMOS CIRCUIT DESIGN LAYOUT AND SIMULATION 3RD EDITION

CMOS 集成电路设计手册第3版·模拟电路篇=CMOS CIRCUIT DESIGN LAYOUT AND SIMULATION ...

Sahrling M. Analog Circuit Simulators for Integrated Circuit Designers 2021

Sahrling M. Analog Circuit Simulators for Integrated Circuit ...

Chap1_20160228_4.dvi

Chap1_20160228_4.dvi

信号与系统 2nd 西蒙赫金

信号与系统 2nd 西蒙赫金

GmID Methodology

GmID Methodology

Cancellation of Amplifier Offset and f-Noise An Improved Chopper Stabilized Technique

Cancellation of Amplifier Offset and f-Noise An Improved Chopper ...

一种LDO使能控制端失效的分析方法

一种LDO使能控制端失效的分析方法

一种基于内部迟滞比较器的新型RC振荡器

一种基于内部迟滞比较器的新型RC振荡器

Publisher: IEEE

Design of class AB output stages using the structural methodology

Design of class AB output stages using the structural methodology

V. Ivanov & I. Filanovsky

Analysis and Design of ESD Protection for Robust Low-Power Pierce Crystal Oscillator Startup

Analysis and Design of ESD Protection for Robust Low-Power Pierce ...

Kim B. Ostman & Erlend Strandvik & Phil Corbishley & Tor Oyvind Vedal & Mika Salmi

A 0.46ps RJ<inf>rms</inf> 5GHz wideband LC PLL for multi-protocol 10Gb/s SerDes

A 0.46ps RJ<inf>rms</inf> 5GHz wideband LC PLL for multi-protocol ...

Chethan Rao & Alvin Wang & Shaishav Desai

A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage CMOS for FPGA applications

A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage ...

Socrates D. Vamvakos & Claude R. Gauthier & Chethan Rao & Karthisha Ramoshan Canagasaby & Prashant Choudhary & Sanjay Dabral & Shaishav Desai & Mahmudul Hassan & K.C. Hsieh & Bendik Kleveland & Gurupada Mandal & Richard Rouse & Ritesh Saraf & Alvin Wang & Jason Yeung & Khaldoon Abugharbieh & Ying Cao

A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation

A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation

Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Ying-Zu Lin & Chung-Ming Huang & Chih-Hao Huang & Linkai Bu & Chih-Chung Tsai

A 240-nA Quiescent Current, 95.8% Efficiency AOT-Controlled Buck Converter With A<sup>2</sup>-Comparator and Sleep-Time Detector for IoT Application

A 240-nA Quiescent Current, 95.8% Efficiency AOT-Controlled ...

Wenbin Huang & Lianxi Liu & Xufeng Liao & Chengzhi Xu & Yonyuan Li

A 470-nA Quiescent Current and 92.7%/94.7% Efficiency DCT/PWM Control Buck Converter With Seamless Mode Selection for IoT Application

A 470-nA Quiescent Current and 92.7%/94.7[..] Efficiency ...

A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process

A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process

Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Yin-Zu Lin

Scaling <formula formulatype="inline"><tex Notation="TeX">$LC$</tex></formula> Oscillators in Nanometer CMOS Technologies to a Smaller Area But With Constant Performance

Scaling <formula formulatype="inli[..] Notation="TeX">$L[..] ...

Shih-An Yu & Peter R. Kinget

The Delta-Sigma Modulator [A Circuit for All Seasons]

The Delta-Sigma Modulator [A Circuit for All Seasons]

A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current Pre-Amplifier for High Frequency Lateral MEMS Oscillators

A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current ...

Hossein Miri Lavasani & Wanling Pan & Brandon Harrington & Reza Abdolvand & Farrokh Ayazi

The Biquadratic Filter [A Circuit for All Seasons]

The Biquadratic Filter [A Circuit for All Seasons]

A low-power small-area /spl plusmn/7.28-ps-jitter 1-GHz DLL-based clock generator

A low-power small-area /spl plusmn/7.28-ps-ji[..] 1-GHz DLL-based ...

Chulwoo Kim & In-Chul Hwang & Sung-Mo Kang

$A modeling approach for /spl Sigma/-/spl Delta/ fractional-N frequency synthesizers allowing straightforward noise analysis$

A modeling approach for /spl Sigma/-/spl Delta/ fractional-N ...

M.H. Perrott & M.D. Trott & C.G. Sodini

A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop Filter PLL Using a Fast Phase-Error Correction Technique

A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop ...

Yongsun Lee & Taeho Seong & Seyeon Yoo & Jaehyouk Choi

A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm CMOS

A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...

Kuan-Yueh Shen & Syed Feruz Syed Farooq & Yongping Fan & Khoa Minh Nguyen & Qi Wang & Mark L. Neidengard & Nasser Kurd & Amr Elshazly

Scaling LC Oscillators in Nanometer CMOS Technologies to a Smaller Area But With Constant Performance

Scaling LC Oscillators in Nanometer CMOS Technologies to a Smaller ...

Shih-An Yu & Peter R. Kinget

Smoothing the Way for Digital Phase-Locked Loops: Clock Generation in the Future with Digital Signal Processing for Mitigating Spur and Interference

Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...

Cheng-Ru Ho & Mike Shuo-Wei Chen

Embedded Mixed-Signal IP Development Methodology in 90nm CMOS SerDes FPGAs

Embedded Mixed-Signal IP Development Methodology in 90nm CMOS ...

Rakesh H. Patel & William Bereza

A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process

A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process

Wenzha Yang & Yi Zhang & Enwen Dai & ZhiLin Feng & Wei Li

A 1.24 μA Quiescent Current NMOS Low Dropout Regulator With Integrated Low-Power Oscillator- Driven Charge-Pump and Switched-Capacitor Pole Tracking Compensation

A 1.24 μA Quiescent Current NMOS Low Dropout Regulator With ...

Raveesh Magod & Bertan Bakkaloglu & Sanjeev Manandhar

Low Drop-Out Voltage Regulators: Capacitor-less Architecture Comparison

Low Drop-Out Voltage Regulators: Capacitor-less Architecture ...

Joselyn Torres & Mohamed El-Nozahi & Ahmed Amer & Seenu Gopalraju & Reza Abdullah & Kamran Entesari & Edgar Sanchez-Sinencio

Digital Beamforming-Based Massive MIMO Transceiver for 5G Millimeter-Wave Communications

Digital Beamforming-Based Massive MIMO Transceiver for 5G Millimeter-Wave ...

Binqi Yang & Zhiqiang Yu & Ji Lan & Ruoqiao Zhang & Jianyi Zhou & Wei Hong

Frequency Reconfigurable mm-Wave Power Amplifier With Active Impedance Synthesis in an Asymmetrical Non-Isolated Combiner: Analysis and Design

Frequency Reconfigurable mm-Wave Power Amplifier With Active ...

Chandrakanth R. Chappidi & Kaushik Sengupta

Millimeter-Wave Frequency Reconfigurable Dual-Band CMOS Power Amplifier for 5G Communication Radios

Millimeter-Wave Frequency Reconfigurable Dual-Band CMOS Power ...

Jaehun Lee & Ji-Seon Paek & Songcheol Hong

Multi-Feed Antenna and Electronics Co-Design: An E-Band Antenna-LNA Front End With On-Antenna Noise-Canceling and <italic>Gₘ</italic>-Boosting

Multi-Feed Antenna and Electronics Co-Design: An E-Band Antenna-LNA ...

A Single-Trim CMOS Bandgap Reference With aInaccuracy of0.15% From40C to 125C

A Single-Trim CMOS Bandgap Reference With aInaccuracy of0.15% ...

Guang Ge & Cheng Zhang & Gian Hoogzaad & Kofi A. A. Makinwa

Design Procedure for Two-Stage CMOS Opamp using gm/ID design Methodology in 16 nm FinFET Technology

Design Procedure for Two-Stage CMOS Opamp using gm/ID design ...

Bakr Hesham & El-Sayed Hasaneen & Hesham F. A. Hamed

IEEE Standard for Ethernet

IEEE Standard for Ethernet