理工书库 lilin | Shelf: 'verilog'

Shelf: 'verilog'

VerilogA系统设计与仿真（可搜索）（吴顺珉）

VerilogA系统设计与仿真（可[..]

Fundamentals of Digital Logic with Verilog Design, THIRD EDITION

Fundamentals of Digital Logic with Verilog Design, THIRD EDITION

Stephen Brown & Zvonko Vranesic

芯片漫游指南

芯片漫游指南

verilog HDL那些事

verilog HDL那些事

数字调制解调技术的MATLAB与FPGA实现 Altera Verilog版杜勇编著

数字调制解调技术的MATLAB与F[..] Altera Verilog版杜勇编著

数字通信同步技术的MATLAB与FPGA实现 Altera Verilog版 [杜勇编著] 2015年版

数字通信同步技术的MATLAB与F[..] Altera Verilog版 [杜勇编著] 2015年版

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

Janick Bergeron & Eduard Cemy & Alan Hunter & Andrew Nightingale 著 & 夏宇闻译

Verilog数字系统设计教程

Verilog数字系统设计教程

SystemVerilog验证测试平台编写指南

SystemVerilog验证测试平台编写指南

Verilog数字VLSI设计教程

Verilog数字VLSI设计教程

【作者】李林编著

Digital integrated circuit design using verilog and systemverilog (Ronald Mehler) (z-lib.org)

Digital integrated circuit design using verilog and systemverilog ...

Fundamentals of Digital Logic with Verilog Design, THIRD EDITION

Fundamentals of Digital Logic with Verilog Design, THIRD EDITION

Stephen Brown & Zvonko Vranesic

UVM实战（卷Ⅰ)

UVM实战（卷Ⅰ)

Universal Verification Methodology (UVM) Cookbook

Universal Verification Methodology (UVM) Cookbook

Functional Verification Methodology Team - Mentor & A Siemens Business

Verification of SD/MMC Controller IP Using UVM

Verification of SD/MMC Controller IP Using UVM

Analog Behavioral Modeling with the Verilog-A Language

Analog Behavioral Modeling with the Verilog-A Language

Verilog HDL Design Examples

Verilog HDL Design Examples

Joseph Cavanagh